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Nova Compatible Mode

Mode 2 · Supernova and Pulsar · Introduced in firmware v4.4.0

Nova Compatible Mode makes a Supernova or Pulsar speak the legacy Binho Nova ASCII protocol over its virtual COM port. Existing Nova host software, most notably binho-python-package, can then talk to the device without modification.

The full protocol is documented in the shared command reference:

{% stepper %} {% step %}

python device_settings_cli.py set --cdc-mode nova_compat

The tool resets the device to apply the change. {% endstep %}

{% step %}

Existing scripts work as-is. The port’s baud rate and framing settings are ignored: this is a USB CDC endpoint, not a real UART. {% endstep %} {% endstepper %}

The emulation is close, but it is not a Nova. Read this before assuming a script that worked on Nova hardware will behave identically here.

These return -NG, so they fail loudly:

  • The entire UART0 command family. Equivalent bridging exists as a separate CDC mode, UART Passthrough, but switching into it from within Nova Compatible Mode.
  • The entire SWI0 command family.
  • The entire 1WIRE0 family on Supernova. Pulsar supports 1-Wire in full.
  • The I2C0 SLAVE family, including its !I2C0 SLAVE RQ / RX interrupts.
  • Mid-transaction I2C0 WRITE: the single-byte and BUF0 forms.
  • Analog and PWM pin modes: IO<n> MODE AIN, AOUT, PWM, TOUCH, and IO<n> PWMFREQ.
  • +LED: accepted, but no LED is driven.
  • +HWVER: returns a hardcoded Nova hardware version, not the device’s real hardware revision. This is deliberate, so Nova host software that checks versions keeps working.
  • I2C0 PULL: sets state only. No hardware pull-up control happens, so a query returns what was set rather than the electrical state of the bus.
  • I2C0 START / END: acknowledged, but no real transaction is opened. That’s also why the mid-transaction single-byte WRITE is rejected.
  • The I2C0 WHR stop flag: parsed and ignored. A repeated start is always used between the write and read phases.
  • SPI0 CPOL / CPHA: query-only.
  • 1WIRE0 BEGIN <pin>: the pin argument is required but ignored. Pulsar drives a fixed onboard 1-Wire bridge rather than bit-banging the pin named.
  • +PWR <interface> <mV> sets the interface rail voltage at runtime: I2C0, SPI0 and GPIO share one rail (1200–3300 mV), and on Pulsar 1WIRE0 takes 3300 or 5000 mV. The setting is session-only and is never written to flash, so it reverts on the next power cycle.
  • GPIO interrupts are unavailable on Supernova Rev B pin GPIO_3.
  • Echo, number base, address width, pull-up state and buffer contents are global and survive a host reconnect: they are not reset when the COM port closes.
  • Any I2C0 or SPI0 command, including a plain query, powers up and claims that peripheral.
  • +MODE 0 1WIRE answers -OK on Pulsar without initializing anything; only 1WIRE0 BEGIN does that.
  • Nova reserves specific IO pins per mode; this firmware has dedicated I2C and SPI pins, so all IO pins stay available. That’s an improvement, but it is a behavioral difference.

The HID system channel keeps running, so switching back is always possible:

python device_settings_cli.py set --cdc-mode uart_passthrough